SYNOPSIS

druc input_name [ -v ] [ -h ]

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DESCRIPTION

DRuC is a general parametrized VLSI design rule checker.
This tool replace the VERSATIL tool that is not anymore supported.
This manual presents the layout rules for tle ALLIANCE symbolic layout approach. The rules are described in a technology file defined by the environment variable RDS_TECHNO_NAME (see bellow).
The root cell and all the instanciated cells (except the intanciated libraries cells) must be in the current directory.
The default mode of DRuC is (currently) full flat: it first flatten all the hierarchy in order to obtain a flat, rectangle level description.

OPTIONS

-v

Verbose mode on. Each step of the DRC is output on the standard output

-h

Hierarchical design rule checking. Generates lots of files locally, to be used by future invocation of druc. Don't ask me if and how this works, but since you also fetched the sources, ...

DESIGN RULES DESCRIPTION

0: LAYER NAME.
This section explicits the layer name used in the following rules.

-  NWELL        : N well


-  NTIE         : N well polarisation


-  PTIE         : P substrat polarisation


-  NDIF         : N diffusion


-  PDIF         : P diffusion


-  GATE         : transistor gate


-  POLY         : polysilicon wire


-  ALU1         : first level of metal


-  ALU2         : second level of metal


-  CONT         : contact between ALU1 and POLY or DIFF


-  VIA          : contact between ALU1 and ALU2

I: LAYER WIDTH.
This class of rules deals with the width limits of a layer. and the conditions for equipotentiality between two overlapping or abutting segments.

rule  1 : 
        the minimum width for a segment of NWELL is 4
        corresponding error codes are : 100 101


rule 2 :
        the minimum width for a segment of NTIE  is 2
        corresponding error code is : 119


rule 3 :
        the minimum width for a segment of PTIE  is 2
        corresponding error codes are : 122 123


rule 4 :
        the minimum width for a segment of NDIF  is 2
        corresponding error codes are : 140 141


rule 5 :
        the minimum width for a segment of PDIF  is 2
        corresponding error codes are : 165 166


rule 6 :
        the minimum width for a segment of GATE  is 1
        corresponding error codes are : 234 235


rule 7 :
        the minimum width for a segment of POLY  is 1
        corresponding error codes are : 234 235


rule 8 :
        the minimum width for a segment of ALU1  is 1 
        corresponding error codes are : 238 239


rule 9 :
        the minimum width for a segment of ALU2  is 2
        corresponding error codes are : 242 243


rule 10 :
        the width of a CONT must be equal to 1
        corresponding error codes are : 246 247


rule 11 :
        the width of a VIA must be equal to 1
        corresponding error codes are : 261 262

II: FORBIDDEN OVERLAP

This class of rules specifies the forbidden overlaps between two layers. (The distance between them must be strictly positive)

rule 12 :
        contact between PTIE and NWELL is forbidden.
        corresponding error codes are : 126 127 128 129 130 131


rule 13 :
        contact between PTIE and NTIE  is forbidden.
        corresponding error codes are : 133 134 135 136 137 138


rule 14 :
        contact between NDIF and NWELL is forbidden.
        corresponding error codes are : 144 145 146 147 148 149


rule 15 :
        contact between NDIF and NTIE  is forbidden.
        corresponding error codes are : 151 152 153 154 155 156


rule 16 :
        contact between NDIF and PTIE  is forbidden.
        corresponding error codes are : 158 159 160 161 162 163


rule 17 :
        contact between PDIF and NTIE  is forbidden.
        corresponding error codes are : 169 170 171 172 173 174


rule 18 :
        contact between PDIF and PTIE  is forbidden.
        corresponding error codes are : 176 177 178 179 180 181


rule 19 :
        contact between PDIF and NDIF  is forbidden.
        corresponding error codes are : 183 184 185 186 187 188


rule 20 :
        contact between GATE and NTIE  is forbidden.
        corresponding error codes are : 191 192 193 194 195 196


rule 21 :
        contact between GATE and PTIE  is forbidden.
        corresponding error codes are : 198 199 200 201 202 203


rule 22 :
        contact between POLY and NTIE  is forbidden.
        corresponding error codes are : 207 208 209 210 211 212


rule 23 :
        contact between POLY and PTIE  is forbidden.
        corresponding error codes are : 214 215 216 217 218 219


rule 24 :
        contact between POLY and NDIF  is forbidden.
        corresponding error codes are : 221 222 223 224 225 226


rule 25 :
        contact between POLY and PDIF  is forbidden.
        corresponding error codes are : 228 229 230 231 232 233


rule 26 :
        contact between CONT and GATE or POLY is forbidden.
        corresponding error codes are : 249 250 251 252 253


rule 27 :
        contact between VIA and GATE   is forbidden.
        corresponding error codes are : 264 265 266 267 268 269


rule 28 :
        contact between VIA and POLY   is forbidden.
        corresponding error codes are : 271 272 273 274 275 276


rule 29 :
        contact between VIA and CONT   is forbidden.
        corresponding error codes are : 278 279 280 281 282 283


rule 30 :
        contact between NTIE and NWELL is forbidden.
        corresponding error code is : 109


rule 31 :
        contact between PDIF and NWELL is forbidden.
        corresponding error code is : 117

III: LAYER NOTCH.
This class of rules deals with the notch limits of a layer.

rule 32 : 
        the minimum notch for a segment of NWELL is 4
        corresponding error code is : 102


rule 33 :
        the minimum notch for a segment of NTIE  is 2
        corresponding error code is : 120


rule 34 :
        the minimum notch for a segment of PTIE  is 2
        corresponding error code is : 124


rule 35 :
        the minimum notch for a segment of NDIF  is 2
        corresponding error code is : 142


rule 36 :
        the minimum notch for a segment of PDIF  is 2
        corresponding error code is : 167


rule 37 :
        the minimum notch for a segment of POLY  is 1
        corresponding error code is : 236


rule 38 :
        the minimum notch for a segment of ALU1  is 2.5 
        corresponding error code is : 240


rule 39 :
        the minimum notch for a segment of ALU2  is 2
        corresponding error code is : 244

IV: MINIMUM SPACING
This class of rules specifies the minimum edge-to-edge distance allowed between two layers.

rule 40 : 
        the minimum distance between NWELL and NWELL is 12
        corresponding error code is : 118


rule 42 :
        the minimum distance between NTIE  and NTIE  is 3
        corresponding error code is : 121


rule 43 : 
        the minimum distance between PTIE  and NWELL is 7.5
        corresponding error code is : 125


rule 44 : 
        the minimum distance between PTIE  and NTIE  is 8
        corresponding error code is : 132


rule 45 : 
        the minimum distance between PTIE  and PTIE  is 3
        corresponding error code is : 139


rule 46 : 
        the minimum distance between NDIF  and NWELL is 7.5
        corresponding error code is : 143


rule 47 :
        the minimum distance between NDIF  and NTIE  is 8
        corresponding error code is : 150


rule 48 : 
        the minimum distance between NDIF  and PTIE  is 3
        corresponding error code is : 157


rule 49 : 
        the minimum distance between NDIF  and NDIF  is 3
        corresponding error code is : 164


rule 51 : 
        the minimum distance between PDIF  and NTIE  is 3
        corresponding error code is : 168


rule 52 : 
        the minimum distance between PDIF  and PTIE  is 8
        corresponding error code is : 175


rule 53 : 
        the minimum distance between PDIF  and NDIF  is 8
        corresponding error code is : 182


rule 54 : 
        the minimum distance between PDIF  and PDIF  is 3
        corresponding error code is : 189


rule 55 : 
        the minimum distance between GATE  and NTIE  is 1
        corresponding error code is : 190


rule 56 : 
        the minimum distance between GATE  and PTIE  is 1
        corresponding error code is : 197


rule 57 : 
        the minimum distance between GATE  and NDIF  is 1
        corresponding error code is : 204


rule 58 : 
        the minimum distance between GATE  and PDIF  is 1
        corresponding error code is : 205


rule 59 : 
        the minimum distance between GATE  and GATE  is 2
        corresponding error code is : 237


rule 60 : 
        the minimum distance between POLY  and NTIE  is 1
        corresponding error code is : 206


rule 61 : 
        the minimum distance between POLY  and PTIE  is 1
        corresponding error code is : 213


rule 62 : 
        the minimum distance between POLY  and NDIF  is 1
        corresponding error code is : 220


rule 63 : 
        the minimum distance between POLY  and PDIF  is 1
        corresponding error code is : 227


rule 64 : 
        the minimum distance between POLY  and GATE  is 2
        corresponding error code is : 237


rule 65 : 
        the minimum distance between POLY  and POLY  is 2
        corresponding error code is : 237


rule 66 : 
        the minimum distance between ALU1  and ALU1  is 2.5
        corresponding error code is : 241


rule 67 : 
        the minimum distance between ALU2  and ALU2  is 2
        corresponding error code is : 245


rule 68 : 
        the minimum distance between CONT  and CONT  is 3
        corresponding error code is : 254




rule 69 : 
        the minimum distance between  VIA  and GATE  is 2
        corresponding error code is : 263


rule 70 : 
        the minimum distance between  VIA  and POLY  is 2
        corresponding error code is : 270


rule 71 : 
        the minimum distance between  VIA  and CONT  is 2
        corresponding error code is : 277


rule 72 : 
        the minimum distance between  VIA  and VIA   is 3
        corresponding error code is : 284


rule 73 : 
        the minimum distance between CONT and GATE or POLY is 1.5
        corresponding error code is : 248

V: TOTAL INCLUSION.
The last class of rules deals with the inclusion of a layer in another one.

rule 74 : 
        NTIE must be included in NWELL with a minimun margin of 0.5
        corresponding error code is : 103


rule 75 : 
        PDIF must be included in NWELL with a minimun margin of 0.5
        corresponding error code is : 110

FILES

If design errors are found, DRuC produces the list of them in two files :

- <root_name.drc>:
This ascii file contains the list of DRC violations.

- <root_name.iii>:
This gds ro cif file contains only rectangles detected in violation.
( suffix iii is defined with the environment )

RDS_OUT_PH is default setted to gds.

EXAMPLE

       druc register

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