SYNOPSIS

int gen8_init_perctx_bb(struct intel_engine_cs * engine, struct i915_wa_ctx_bb * wa_ctx, uint32_t *const batch, uint32_t * offset);

ARGUMENTS

engine

-- undescribed --

wa_ctx

structure representing wa_ctx

batch

page in which WA are loaded

offset

This field specifies the start of this batch. This batch is started immediately after indirect_ctx batch. Since we ensure that indirect_ctx ends on a cacheline this batch is aligned automatically.

OFFSET

specifies start of the batch, should be cache-aligned.

SIZE

size of the batch in DWORDS but HW expects in terms of cachelines

DESCRIPTION

The number of DWORDS written are returned using this field.

This batch is terminated with MI_BATCH_BUFFER_END and so we need not add padding to align it with cacheline as padding after MI_BATCH_BUFFER_END is redundant.

AUTHORS

Jesse Barnes <[email protected]>
Intel Corporation,         
        

Initial version

Laurent Pinchart <[email protected]>
Ideas on board SPRL,         
        

Driver internals

Daniel Vetter <[email protected]>
Intel Corporation,         
        

Contributions all over the place

Lukas Wunner <[email protected]>

vga_switcheroo documentation

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