icetime(1) generate timing estimates


icetime [OPTIONS] FILE.asc


Generate timing estimates from a textual bitstream file (such as output from arachne-pnr).


-p <pcf_file>
Specify PCF file to use (needed for correct IO pin names).
-P <chip_package>
Specify chip package (needed for correct IO pin names).
-g <net_index>
Write a graphviz description of the interconnect tree that includes the given net to ''.
-o <output_file>
Write verilog netlist to the named file. Use '-' for stdout.
-r <output_file>
Write timing report to the named file (instead of stdout).
-d lp1k|hx1k|lp8k|hx8k
Select the device type (default = lp variant).
Enable max_span_hack for conservative timing estimates.
Only consider interior timing paths (not to/from IOs).
Print a timing estimate (based on topological timing analysis).
-T <net_name>
Print a timing estimate for the specified net.
Verbose mode (print all interconnect trees).


This manual page was written by Sebastian Kuzminsky <[email protected]> for the Debian project (and may be used by others).