Verilog::Std(3) SystemVerilog Built-in std Package Definition


Internally used by Verilog::SigParser, etc.

use Verilog::Std;
print Verilog::Std::std;


Verilog::Std contains the built-in ``std'' package required by the SystemVerilog standard.


std ({standard})
Return the definition of the std package. Optionally pass the language standard, defaulting to what Verilog::Language::language_standard returns if unspecified.


Verilog-Perl is part of the <> free Verilog EDA software tool suite. The latest version is available from CPAN and from <>.

Copyright 2009-2016 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.


Wilson Snyder <[email protected]>