SYNOPSIS

To compile this driver into the kernel, place the following lines in your kernel configuration file:

device scbus device ahc

For one or more VL/EISA cards: device eisa

For one or more PCI cards: device pci

To allow PCI adapters to use memory mapped I/O if enabled: options AHC_ALLOW_MEMIO

To configure one or more controllers to assume the target role: options AHC_TMODE_ENABLE <bitmask of units>

Alternatively, to load the driver as a module at boot time, place the following lines in loader.conf5:

ahc_load="YES"
ahc_eisa_load="YES"
ahc_isa_load="YES"
ahc_pci_load="YES"

DESCRIPTION

This driver provides access to the SCSI bus(es) connected to the Adaptec AIC77xx and AIC78xx host adapter chips.

Driver features include support for twin and wide busses, fast, ultra or ultra2 synchronous transfers depending on controller type, tagged queueing, SCB paging, and target mode.

Memory mapped I/O can be enabled for PCI devices with the ``AHC_ALLOW_MEMIO '' configuration option. Memory mapped I/O is more efficient than the alternative, programmed I/O. Most PCI BIOSes will map devices so that either technique for communicating with the card is available. In some cases, usually when the PCI device is sitting behind a PCI->PCI bridge, the BIOS may fail to properly initialize the chip for memory mapped I/O. The typical symptom of this problem is a system hang if memory mapped I/O is attempted. Most modern motherboards perform the initialization correctly and work fine with this option enabled.

Individual controllers may be configured to operate in the target role through the ``AHC_TMODE_ENABLE '' configuration option. The value assigned to this option should be a bitmap of all units where target mode is desired. For example, a value of 0x25, would enable target mode on units 0, 2, and 5. A value of 0x8a enables it for units 1, 3, and 7.

Per target configuration performed in the SCSI-Select menu, accessible at boot in non- EISA models, or through an EISA configuration utility for EISA models, is honored by this driver. This includes synchronous/asynchronous transfers, maximum synchronous negotiation rate, wide transfers, disconnection, the host adapter's SCSI ID, and, in the case of EISA Twin Channel controllers, the primary channel selection. For systems that store non-volatile settings in a system specific manner rather than a serial eeprom directly connected to the aic7xxx controller, the BIOS must be enabled for the driver to access this information. This restriction applies to all EISA and many motherboard configurations.

Note that I/O addresses are determined automatically by the probe routines, but care should be taken when using a 284x (VESA local bus controller ) in an EISA system. The jumpers setting the I/O area for the 284x should match the EISA slot into which the card is inserted to prevent conflicts with other EISA cards.

Performance and feature sets vary throughout the aic7xxx product line. The following table provides a comparison of the different chips supported by the driver. Note that wide and twin channel features, although always supported by a particular chip, may be disabled in a particular motherboard or card design.

Chip Ta MIPS Ta Bus Ta MaxSync Ta MaxWidth Ta SCBs Ta Features

"aic7770" Ta 10 Ta EISA/VL Ta 10MHz Ta 16Bit Ta 4 Ta 1

"aic7850" Ta 10 Ta PCI/32 Ta 10MHz Ta 8Bit Ta 3 Ta

"aic7860" Ta 10 Ta PCI/32 Ta 20MHz Ta 8Bit Ta 3 Ta

"aic7870" Ta 10 Ta PCI/32 Ta 10MHz Ta 16Bit Ta 16 Ta

"aic7880" Ta 10 Ta PCI/32 Ta 20MHz Ta 16Bit Ta 16 Ta

"aic7890" Ta 20 Ta PCI/32 Ta 40MHz Ta 16Bit Ta 16 Ta 3 4 5 6 7 8

"aic7891" Ta 20 Ta PCI/64 Ta 40MHz Ta 16Bit Ta 16 Ta 3 4 5 6 7 8

"aic7892" Ta 20 Ta PCI/64 Ta 80MHz Ta 16Bit Ta 16 Ta 3 4 5 6 7 8

"aic7895" Ta 15 Ta PCI/32 Ta 20MHz Ta 16Bit Ta 16 Ta 2 3 4 5

"aic7895C" Ta 15 Ta PCI/32 Ta 20MHz Ta 16Bit Ta 16 Ta 2 3 4 5 8

"aic7896" Ta 20 Ta PCI/32 Ta 40MHz Ta 16Bit Ta 16 Ta 2 3 4 5 6 7 8

"aic7897" Ta 20 Ta PCI/64 Ta 40MHz Ta 16Bit Ta 16 Ta 2 3 4 5 6 7 8

"aic7899" Ta 20 Ta PCI/64 Ta 80MHz Ta 16Bit Ta 16 Ta 2 3 4 5 6 7 8

1. Multiplexed Twin Channel Device - One controller servicing two busses.
2. Multi-function Twin Channel Device - Two controllers on one chip.
3. Command Channel Secondary DMA Engine - Allows scatter gather list and SCB prefetch.
4. 64 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA.
5. Block Move Instruction Support - Doubles the speed of certain sequencer operations.
6. `Bayonet' style Scatter Gather Engine - Improves S/G prefetch performance.
7. Queuing Registers - Allows queueing of new transactions without pausing the sequencer.
8. Multiple Target IDs - Allows the controller to respond to selection as a target on multiple SCSI IDs.

HARDWARE

The driver supports the following SCSI host adapter chips and SCSI controller cards:

• Adaptec AIC7770 host adapter chip
• Adaptec AIC7850 host adapter chip
• Adaptec AIC7860 host adapter chip
• Adaptec AIC7870 host adapter chip
• Adaptec AIC7880 host adapter chip
• Adaptec AIC7890 host adapter chip
• Adaptec AIC7891 host adapter chip
• Adaptec AIC7892 host adapter chip
• Adaptec AIC7895 host adapter chip
• Adaptec AIC7896 host adapter chip
• Adaptec AIC7897 host adapter chip
• Adaptec AIC7899 host adapter chip
• Adaptec 274X(W)
• Adaptec 274X(T)
• Adaptec 284X
• Adaptec 2910
• Adaptec 2915
• Adaptec 2920C
• Adaptec 2930C
• Adaptec 2930U2
• Adaptec 2940
• Adaptec 2940J
• Adaptec 2940N
• Adaptec 2940U
• Adaptec 2940AU
• Adaptec 2940UW
• Adaptec 2940UW Dual
• Adaptec 2940UW Pro
• Adaptec 2940U2W
• Adaptec 2940U2B
• Adaptec 2950U2W
• Adaptec 2950U2B
• Adaptec 19160B
• Adaptec 29160B
• Adaptec 29160N
• Adaptec 3940
• Adaptec 3940U
• Adaptec 3940AU
• Adaptec 3940UW
• Adaptec 3940AUW
• Adaptec 3940U2W
• Adaptec 3950U2
• Adaptec 3960
• Adaptec 39160
• Adaptec 3985
• Adaptec 4944UW
• NEC PC-9821Xt13 (PC-98)
• NEC RvII26 (PC-98)
• NEC PC-9821X-B02L/B09 (PC-98)
• NEC SV-98/2-B03 (PC-98)
• Many motherboards with on-board SCSI support

SCSI CONTROL BLOCKS (SCBs)

Every transaction sent to a device on the SCSI bus is assigned a `SCSI Control Block' (SCB). The SCB contains all of the information required by the controller to process a transaction. The chip feature table lists the number of SCBs that can be stored in on-chip memory. All chips with model numbers greater than or equal to 7870 allow for the on chip SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. Very few Adaptec controller configurations have external SRAM.

If external SRAM is not available, SCBs are a limited resource. Using the SCBs in a straight forward manner would only allow the driver to handle as many concurrent transactions as there are physical SCBs. To fully utilize the SCSI bus and the devices on it, requires much more concurrency. The solution to this problem is SCB Paging a concept similar to memory paging. SCB paging takes advantage of the fact that devices usually disconnect from the SCSI bus for long periods of time without talking to the controller. The SCBs for disconnected transactions are only of use to the controller when the transfer is resumed. When the host queues another transaction for the controller to execute, the controller firmware will use a free SCB if one is available. Otherwise, the state of the most recently disconnected (and therefore most likely to stay disconnected) SCB is saved, via dma, to host memory, and the local SCB reused to start the new transaction. This allows the controller to queue up to 255 transactions regardless of the amount of SCB space. Since the local SCB space serves as a cache for disconnected transactions, the more SCB space available, the less host bus traffic consumed saving and restoring SCB data.

HISTORY

The driver appeared in Fx 2.0 .

AUTHORS

The driver, the AIC7xxx sequencer-code assembler, and the firmware running on the aic7xxx chips was written by An Justin T. Gibbs .