SYNOPSIS

enum forcewake_domains intel_uncore_forcewake_for_reg(struct drm_i915_private * dev_priv, i915_reg_t reg, unsigned int op);

ARGUMENTS

dev_priv

pointer to struct drm_i915_private

reg

register in question

op

operation bitmask of FW_REG_READ and/or FW_REG_WRITE

DESCRIPTION

Returns a set of forcewake domains required to be taken with for example intel_uncore_forcewake_get for the specified register to be accessible in the specified mode (read, write or read/write) with raw mmio accessors.

NOTE

On Gen6 and Gen7 write forcewake domain (FORCEWAKE_RENDER) requires the callers to do FIFO management on their own or risk losing writes.

AUTHORS

Jesse Barnes <[email protected]>
Intel Corporation,         
        

Initial version

Laurent Pinchart <[email protected]>
Ideas on board SPRL,         
        

Driver internals

Daniel Vetter <[email protected]>
Intel Corporation,         
        

Contributions all over the place

Lukas Wunner <[email protected]>

vga_switcheroo documentation

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