DESCRIPTION
ERROR: ld.so: object 'libfakeroot-sysv.so' from LD_PRELOAD cannot be preloaded (cannot open shared object file): ignored. OVERVIEW: llvm MC-JIT toolUSAGE: llvm-rtdyld [options] <input file>
OPTIONS:
General options:
-
-aarch64-neon-syntax - Choose style of NEON code to emit from AArch64 backend:
- =generic
- - Emit generic NEON assembly
- =apple
- - Emit Apple-style NEON assembly
-
-bounds-checking-single-trap - Use one trap block per function
- -check=<string> - File containing RuntimeDyld verifier checks.
- -color - use colored syntax highlighting (default=autodetect)
- -cppfname=<function name> - Specify the name of the generated function
- -cppfor=<string> - Specify the name of the thing to generate
- -cppgen - Choose what kind of output to generate
- =program
- -check=<string> - File containing RuntimeDyld verifier checks.
- - Generate a complete program
- =module
- - Generate a module definition
- =contents
- - Generate contents of a module
- =function
- - Generate a function definition
- =functions
- - Generate all function definitions
- =inline
- - Generate an inline function
- =variable
- - Generate a variable definition
- =type
- - Generate a type definition
-
-disable-spill-fusing - Disable fusing of spill code into instructions
- -dylib=<string> - Add library.
- -enable-implicit-null-checks - Fold null checks into faulting memory operations
- -enable-load-pre -
- -enable-objc-arc-opts - enable/disable all ARC Optimizations
- -enable-scoped-noalias -
- -enable-tbaa -
- -entry=<string> - Function to call as entry point.
- -exhaustive-register-search - Exhaustive Search for registers bypassing the depth and interference cutoffs of last chance recoloring
- -gpsize=<uint> - Global Pointer Addressing Size.
- -dylib=<string> - Add library.
-
- The default size is 8.
-
-imp-null-check-page-size=<uint> - The page size of the target in bytes
- -internalize-public-api-file=<filename> - A file containing list of symbol names to preserve
- -internalize-public-api-list=<list> - A list of symbol names to preserve
- -join-liveintervals - Coalesce copies (default=true)
- -limit-float-precision=<uint> - Generate low-precision inline sequences for some float libcalls
- -mcpu=<cpu-name> - Target a specific cpu type (-mcpu=,help/ for details)
- -mips16-constant-islands - Enable mips16 constant islands.
- -mips16-hard-float - Enable mips16 hard float.
- -mno-ldc1-sdc1 - Expand double precision loads and stores to their single precision counterparts
- -no-discriminators - Disable generation of discriminator information.
- -nvptx-sched4reg - NVPTX Specific: schedule for register pressue
- -print-after-all - Print IR after each pass
- -print-before-all - Print IR before each pass
- -print-machineinstrs=<pass-name> - Print machine instrs
- -regalloc - Register allocator to use
- =default
- -internalize-public-api-file=<filename> - A file containing list of symbol names to preserve
- - pick register allocator based on -O option
- =basic
- - basic register allocator
- =fast
- - fast register allocator
- =greedy
- - greedy register allocator
- =pbqp
- - PBQP register allocator
-
-rewrite-map-file=<filename> - Symbol Rewrite Map
- -rng-seed=<seed> - Seed for the random number generator
- -sample-profile-max-propagate-iterations=<uint> - Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.
- -stackmap-version=<int> - Specify the stackmap encoding version (default = 1)
- -stats - Enable statistics output from program (available with Asserts)
- -time-passes - Time each pass, printing elapsed time for each on exit
- -triple=<string> - Target triple for disassembler
- -rng-seed=<seed> - Seed for the random number generator
-
- Action to perform:
-
-execute - Load, link, and execute the inputs.
- -printline - Load, link, and print line information for each function.
- -printdebugline - Load, link, and print line information for each function using the debug object
- -printobjline - Like -printlineinfo but does not load the object first
- -verify - Load, link and verify the resulting memory image.
- -verify-debug-info -
- -verify-dom-info - Verify dominator info (time consuming)
- -verify-loop-info - Verify loop info (time consuming)
- -verify-regalloc - Verify during register allocation
- -verify-region-info - Verify region info (time consuming)
- -verify-scev - Verify ScalarEvolution's backedge taken counts (slow)
- -x86-asm-syntax - Choose style of code to emit from X86 backend:
- =att
- -printline - Load, link, and print line information for each function.
- - Emit AT&T-style assembly
- =intel
- - Emit Intel-style assembly
-
-help - Display available options (-help-hidden for more)
- -help-list - Display list of available options (-help-list-hidden for more)
- -version - Display the version of this program
- -help-list - Display list of available options (-help-list-hidden for more)