SYNOPSIS

To compile this driver into the kernel, place the following lines in your kernel configuration file:

device crypto device padlock

Alternatively, to load the driver as a module at boot time, place the following line in loader.conf5:

padlock_load="YES"

DESCRIPTION

The C3 and Eden processor series from VIA include hardware acceleration for AES. The C7 series includes hardware acceleration for AES, SHA1, SHA256 and RSA. All of the above processor series include a hardware random number generator.

The driver registers itself to accelerate AES operations and, if available, HMAC/SHA1 and HMAC/SHA256 for crypto(4). It also registers itself to accelerate other HMAC algorithms, although there is no hardware acceleration for those algorithms. This is only needed so can work with ipsec(4).

The hardware random number generator supplies data for the kernel random(4) subsystem.

HISTORY

The driver first appeared in Ox . The first Fx release to include it was Fx 6.0 .

AUTHORS

An -nosplit The driver with AES encryption support was written by An Jason Wright Aq [email protected] . It was ported to Fx and then extended to support SHA1 and SHA256 by An Pawel Jakub Dawidek Aq [email protected] . This manual page was written by An Christian Brueffer Aq [email protected] .